 |
SSTL_2 Interface 2.6V |
|
2-bit pre-fetch |
|
Double-data-rate architecture |
|
Differential clock inputs(CK and CK) |
|
Programmable Burst length (2, 4, 8) |
|
Programmable Burst type (sequential & interleave) |
|
Auto & Self refresh, 7.8us refresh interval
(8K/64ms refresh) |
|
Serial presence detect with EEPROM |
|
TSOP II and FBGA Pb-Free package |
|
All of Lead-free products are compliant for RoHS |
|
PCB Dimension 30.0mm |
|
Storage Temperature -55°C ~+150°C |
|
Operating Temperature 0°C ~ + 70°C |
DDR
Features:
